[En-Nut-Discussion] SRAM speed

[Harald Kipp]

Alastair,

Your question requires some deeper digging into the
datasheets and I probably had to get back to this
issue a second time.

Just not to let you wait too long, here's the history
of Ethernut 1.3d RAM access:

First we replaced the ATmega103 with the ATmega128,
still running at 3.6864 MHz. The main problems were
then solved with this prototype (software, fuses, etc.)

Next someone else tried 8.0 and 11.0952 MHz, knowing
that this would be beyond calculated limits, especially
for the HC573. We wanted to figure out correct wait
state settings for the CPU. But the boards worked
fine without wait states. The oscilloscope showed
clean signals.

After we received our first 200 boards from production
(SMD only) we tried about 20 of them with 14.7456 MHz.
Address signals on the scope showed, that the HC573
was really at its limits. But amazingly all boards
worked reliable. From analyzing the EMC spectrum we
knew, that this is the noisiest chip. We tried an
AHC573 and got a large peak (+20 dB!!!) with the
near field probe at 35 MHz. We decided to keep the
HC573.

In the meantime we produced several hundred Ethernuts,
not a single one failed because of memory problems.
One customer, who ordered a SMD only version, reported
a memory failure recently. We are waiting for further
results from him. Nearly 1% of our production doesn't
pass the test. Nearly all of these failed on the
Ethernet part (no link LED). Possibly a problem with
the stuffing machine, bad SMD pads, insufficient markers
or something like that.

On the other side I must admit, that we use additional
wait states in our own applications. Some of these systems
are exposed to expanded temperature ranges. Not really
outside, but in unheated rooms.

This is just the history. As I said, this has to be
continued. Using a PLD will probably change the
situation.

Kind regards,

Harald Kipp