[En-Nut-Discussion] network throughput gain (nicrtl output)

[Ralph Mason]

If your using a CPLD why not just do a DMA mode?

Set a Read address and a write address, and a number of bytes and set it
going, with an output done line.

You could clock it from the same crystal as the AVR and do a byte per clock.
Then in the AVR code you set it up and wait for the done line.

But if you do all this why not just use a faster chip some ARM variant
perhaps, and get rid of the CPLD etc altogether.  They are as cheap as an
mega128 these days anyway.

Ralph


> -----Original Message-----
> From: en-nut-discussion-bounces at egnite.de
> [mailto:en-nut-discussion-bounces at egnite.de]On Behalf Of Waschk,Kolja
> Sent: Monday, 1 December 2003 10:55
> To: Ethernut User Chat (English)
> Subject: Re: [En-Nut-Discussion] network throughput gain (nicrtl output)
>
>
> > If I'm not wrong, this is even 1 cycle faster.
>
> > .L94:
> >  ld r24,Z+
> >  sts -16376,r24
> >  subi r22,lo8(-(-1))
> >  sbci r23,hi8(-(-1))
> >  brne .L94
>
> 4+4+1+1+2 = 12 cycles per byte, whereas
>
> >> .L94:
> >>   ld r24,X+
> >>   std Y+16,r24
> >>   subi r18,1
> >>   brcc .L94
> >>  subi r19,1
> >>  brcc .L94
>
> 4+4+1+2 = 11 cycles most of the time,
> 4+4+1+1+1+2 = 13 cycles only at 8 bit boundary
>
> For 536 bytes that's about 9% gain
>
> To push throughput even more, I'm currently playing with the idea of
> implementing an operating mode where m128 issues a read from RAM
> and some logic
> (CPLD) translates this into a write access to the MAC at the same
> time (RAM
> outputs data, MAC reads it).  Thus no explicit write instruction would be
> needed, and the inner loop would shrink to 7 cycles. Anyone tried
> something
> similar before?
>
> Kolja
>
> --
> mr. kolja waschk - haubach-39 - 22765 hh - ger
> phone +49 40 889130-34 - fax -35 - e-mail s.a.
>
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