[En-Nut-Discussion] RFC: Ethernut IDE/CF Interface

Zodianet zodianet at wanadoo.fr
Wed Jan 21 12:56:32 CET 2004

Few months ago, I bought the Wireless Lan ER22 Board from IOSOFT
(http://www.iosoft.co.uk/wlan2.php) with complete Software/hardware sources.
(Humm.. Nut/OS & ethernut are from far better et less expensive) 
Its works with the netgear MA401 802.11b PCMCIA card, but with IDE lines
emulated by I/O. 
If these sources can help you...  

-----Original Message-----
From: en-nut-discussion-bounces at egnite.de
[mailto:en-nut-discussion-bounces at egnite.de]On Behalf Of Harald Kipp
Sent: 21 January 2004 10:42
To: en-nut-discussion at egnite.de
Subject: [En-Nut-Discussion] RFC: Ethernut IDE/CF Interface


Several people suggested an Ethernut IDE/CF interface during the last months
(should I say years).

Once again we thought to have something final now, but actually new problems
appeared and I'd like to do it right.

Some history:

Michael Fischer came up with a working IDE board based on two PALs. We
decided to switch to a CPLD.

The CPLD version was again done by Michael and I did the board layout. This
already included a 5V CompactFlash interface.

Again a new design was started, adding 3.3V capabilities to the CF interface
with 74LVC245 level shifters.

But this interface does support true IDE mode only and would not work with
CF+ cards like the Netgear MA701.

Recently Michael builds a PCMCIA prototype for the Ethernut and a 5V MA401
WLAN card. But he soon realizes, that accessing the card fails because in
port mode and memory mode the card activates its WAIT line. This problem is
similar to the RTL8019AS IOCHRDY issue. The ATmega128 can't extend memory
access cycles on external signals. I'm sure that this will also occure with
CF cards, the ATmega128 is too fast.

The final idea is now to use one dedicated CPLD for the CF interface and one
for the IDE drives.
The IDE would use a 5V CPLD and the CF interface would be attached to a 3.3V
TTL tolerant type.
But I'm not sure, if this is really required or if both interface could use
a single CPLD.

The CF CPLD should then take care of the CF Wait Signal and emulate the
memory access cycle delays.
But I do not know much about clocked CPLDs. The one on the Ethernut is fully

Any ideas, comments?


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