[En-Nut-Discussion] Major memory mapping changes?

[Radek Podgorny]

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Hi everybody,

so I'm back with my problem. We've been working hard trying to resolve the
bug and after a time, even the 1.3 started to make errors so it's NOT
ethernut related. We're currently reworking our external circuitry so I'll
let you know in few days...

Thanks for the effort though...
Radek

>
>
> Hello Radek,
>
> Radek Podgorny wrote:
>
>> I thought the address and data bus is connected directly to the MCU.
>
> There _must_ be a latch to obtain 16-bit wide address bus,
> as on the MCU side the data lines and half of address lines share the same
> pins.
> Have a look into datasheet, search for ALE signal.
>
>> So
>> there is a latch somewhere in between operating at 3.3V? If you're
>> talking
>> about the CPLD itself, the 3.3V level it outputs shouldn't matter as
>> long
>> as the levels on the "main" bus (the one connected directly to the MCU
>> and
>> the pins) is 5V.
>
> Not necessarily, I belive that CPLD is 5V tolerant and even 3.3V singals
> reach the MCU theshold.
>
> Pavel
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>


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