[En-Nut-Discussion] Major memory mapping changes?

[Michael Fischer]

Hello Radek,

I could not belive that this is an Ethernut2 problem.
Because the datanut is working in the area 0xD000.

>4. The CPLD picture you posted, look at the top right hand part at the AND
>with A14 and A15 on inputs and SRAMCS on outputs. Does this mean that
>address bits 14 and 15 have to be set to read from the banked memory? If
>so, then it's not mapped to 0x8000 but to 0xC000. This seems weird as the
>NIC (mapped to 0xC000 works fine).

A14 and A15 to the AND gate:

A15  A14 Output AND
 0    0    0 -> select RAM
 0    1    0 -> select RAM
 1    0    0 -> select RAM
 1    1    1 -> NOT select RAM

This mean 0x0000 - 0xBFFF is the RAM area.
0x0000 - 0x7FFF is the normal 32K RAM and
0x8000 - 0xBFFF is the window from the bank memory.

The NIC starts by 0xC000. I think 0xC000 - 0xC0FF.

Regards,

Michael