[En-Nut-Discussion] Ethernut 2 with RTL8019AS

["Ing. Zdeněk Hanák jr."]

Hi everyone,

I am new in your group and I'd like to design new
board based on Ethernut 2 but with RTL8019AS.

More detailed, from Ethernut 2 reference design I want
use CPU (changed to AT90CAN128), Xilinx (without change), DataFlash 
(without change), 512kB SRAM (without change), RTL8019AS (may be 
addressing change).

My question is about the structure of external RAM space.

Space 0x0000-0x7FFF address internal SRAM and first
almost 32kB external SRAM.
Space 0x8000-0xBFFF address remaining external SRAM banks access.
Space 0xC000-0xFEFF I want use for NIC addressing (using NIC_CS
signal from Xilinx).
Space 0xFF00-0xFFFF for bank swithing.

I hope this structure of address space is possible.
Can anyone help me with connection address pins of RTL8019AS ?

Is this connection of address bits of RTL possible/right ?
- SA0-SA14 to A0-A14
- SA15 to NIC_CS from Xilinx
- SA16-SA19 to GND

In this case, the base address of RTL is 0xC000, 0xC300 or something
another ?
I am not familiar yet with the NutOS code. There is address
of RTL fixed to 0x8300 or it is correctly adjustable ? I have found
only constant inside the realtek.c for example...

Thanks.
Zdenek

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