[En-Nut-Discussion]Problem with ADC

[Matthias Ringwald]

hi

I remember reading in the avr128 datasheet that the adc can sample up  
to 10.000 Samples/sec. (without a specific clock in mind).
By checking the formulas in the datasheet I figured out that I can  
get 250.000 Samples/sec on our BTnode which is running at 7.328 Mhz.  
And this calculation was correct, I got a sample roughly every 4 uS.  
Maybe the accuracy goes down but this was no issue to me and I didn't  
verify the final accuracy/

m.

On 23.05.2006, at 18:29, Tim Tait wrote:

> ..
> You can set the ADC clock divisor with a limited range of values  
> describer in the AVR datasheet. Depending on the AVR main clock  
> input, it is possible set the ADC clock faster than the hardware  
> actually supports.
>