[En-Nut-Discussion] Stack size of exeptions in ARM.
rtems
rtems at 126.com
Mon May 29 08:11:03 CEST 2006
Hi,
I have begun porting ethernut to AT91SAM7X MCU from ETHERNUT3 package. With WinARM and openocd, I can debug the software on an AT91SAM7X-EK clone board now.
When working on the assembly start code, I noticed these lines to set the exception stacks:
IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level
FIQ_STACK_SIZE = (3*4) @ 3 words
ABT_STACK_SIZE = (1*4) @ 1 word
UND_STACK_SIZE = (1*4) @ 1 word
…
.section .init2,"ax",%progbits
/*
* Set exception stack pointers and enable interrupts.
*/
ldr r0, =__xcp_stack
msr CPSR_c, #ARM_MODE_FIQ | 0xC0
mov r13, r0
sub r0, r0, #FIQ_STACK_SIZE
msr CPSR_c, #ARM_MODE_IRQ | 0xC0
mov r13, r0
sub r0, r0, #IRQ_STACK_SIZE
msr CPSR_c, #ARM_MODE_ABORT | 0xC0
mov r13, r0
sub r0, r0, #ABT_STACK_SIZE
msr CPSR_c, #ARM_MODE_UNDEF | 0xC0
mov r13, r0
sub r0, r0, #UND_STACK_SIZE
msr CPSR_c, #ARM_MODE_SVC | 0xC0
mov r13, r0
b __enter_user
...
I understand ARM uses different stacks in every mode. But why the stack size for every mode is so small?
For example, FIQ_STACK_SIZE is only 3 words, while the following IRQ_ENTRY code already uses more then it.
#define IRQ_ENTRY() \
asm volatile("sub lr, lr,#4" "\n\t" /* Adjust LR */ \
"stmfd sp!,{r0-r12,lr}" "\n\t" /* Save registers on IRQ stack. */ \
"mrs r1, spsr" "\n\t" /* Save SPSR */ \
"stmfd sp!,{r1}" "\n\t") /* */
I ever guessed that the exceptions in ethernut can not be nested. But if so, all them may share the same stack and need not deal with these several xxx_STACK_SIZE.
I’m a newbie to ARM. Any comment is welcome.
Thanks.
HU Daidai
2006-05-29
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