AW: [En-Nut-Discussion] UART_SETCLOCKMODE - UART_NSYNCSLAVE

[Ernst Stippl]

Hi Dave!

I would try to:

-do a fresh install of Ethernut 4.0.3 it's still regarded as the latest
"stable" release
-take your current winavr install (the "latest" is, as far as I see, the
20060421 version, which is avr-gcc 3.4.6), or, even better and to be
completely sure, re-install it, too. the newer winavr versions add
information to the windows registry, so a clean install is always a good
thing.
Thru this two steps, you should be certain that your Nut/OS and gcc installs
are "in sync".

-take one or two of the sample apps (from the \uart and from the \rs232d
directory) compile and run them to verify they execute OK
-to minimize the need for new/additional makefiles, replace \uart\uart.c
with your code (under the same name) and use the same make commands to
compile, link and download. This should be the safest way to verify
compilation of your code works together with all the changes in Nut/OS and
gcc.

Next I would verify that the interrupt routine is really ONLY triggered when
you hit a key. printf of a fixed char will do. This way, you verify that the
character which is then further processed, comes from the interrupt routine.
Last, it's necessary to find out what char is actually made avail in
UDR/UDR1. What puzzles me is that I think to remember that the scan codes
sent from the PC keyboard are more than 8 bits (I just googled "PC keyboard
scan codes" and found that SOME keystrokes produce multiple "bytes" sent to
the "host" computer.

I just had a look at Nut/OS API on the web (by searching for
UART_NSYNCSLAVE) and found:


Define Documentation

#define UART_SYNCSLAVE   UART_SYNC  
 
Synchronous slave mode. 
Transmit data changes on rising edge and receive data is sampled on the
falling edge of the clock input. 

#define UART_SYNCMASTER   (UART_SYNC | UART_MASTER)  
 
Synchronous master mode. 
Transmit data changes on rising edge and receive data is sampled on the
falling edge of the clock output. 
 
#define UART_NSYNCSLAVE   (UART_SYNC | UART_NCLOCK)  

Synchronous slave mode, clock negated. 
Similar to UART_SYNCSLAVE, but transmit data changes on falling edge and
receive data is sampled on the rising edge of the clock input. 

#define UART_NSYNCMASTER   (UART_SYNC | UART_NCLOCK | UART_MASTER)  

Synchronous master mode, clock negated. 
Similar to UART_SYNCMASTER, but transmit data changes on falling edge and
receive data is sampled on the rising edge of the clock output. 
 
#define UART_ASYNC_HS   UART_HIGHSPEED  
 
It seems to me from this documentation that the UART_SYNCSLAVE is your way
to go because it samples on the falling edge of the clock signal!
For UART_NSYNCSLAVE it says:  Synchronous slave mode, clock negated. <---
This may be the reason for the "same" (read: strange) character "seen" by
the UART and your interrupt routine.

Good luck & regards!

Ernst