[En-Nut-Discussion] Internet radio with inbuilt AT73C213 DAC on AT91SAM9260-EK?

[ajitn at inventionlabs.in]

Hi Harald,
Thanks for your reply. You raise a valid point.
Having said that, the AT73C213 driver included in some of the app projects
on arc (for example, the AT73C213 driver in testmp3dec) works fine with
the webradio project. In fact, I have a radio station running right now on
my AT91SAM9260 board without a Calypso board. Sounds pretty high-quality
to me (though there may be some white noise, I don't have enough audio
experience to make out :-)).
I'll take a look at the PCK/SSC TK synchronization issue anyway.

-Ajit

> Hi Ajit,
>
> ajitn at inventionlabs.in schrieb:
>> I noticed that the Calypso board is required for the DAC and user
>> interface. I also noticed that the AT91SAM9260-EK board already has a
>> DAC
>> (AT73C213), and a couple of push buttons. I was wondering why the
>> Internet
>> Radio code cannot be made to use the on-board DAC instead of using the
>> external DAC so that the Calypso board can be done without for this
>> project. Has anyone tried this before? Are there any problems with this
>> approach?
>>
> One reason for adding a DAC to Calypso was, that the board should work
> with the AT91SAM7XC256-EK as well, which doesn't include a DAC. In the
> initial release we used the AT73C213 on the Calypso. We experienced a
> problem though.
>
> When looking at chapter "7.4 Timing Specifications" of the AT73C213
> datasheet, there is a maximum specified for td1 (max. delay between
> rising edges of MCLK and BCLK) of 7.5ns. When the application is
> started, this is maintained more or less well. However, after
> re-programming the PLL for new sample rates, the delay between both
> rising edges is often far beyond the limit. As a result, the audio
> output is overlaid by white noise.
>
> As far as I understood the SAM9 hardware, PCK (MCLK at the DAC) and SSC
> TK (BCLK at the DAC) are driven by two independent dividers. I have no
> idea how to make sure, that both clocks are in sync. We tried a really
> large number of different initializations, clock enables and disables,
> SSC resets, power mode controls etc. etc. None of them provided any
> reproducible phase between these two clocks. As far as I can say,
> nothing except an MCU reset clears the internal dividers.
>
>> If anyone has tried this before (created a driver for AT73C213), or
>> anyone
>> has created a similar SPI interface for a DAC, I would be happy to know
>> about it.
>>
>
> So do I,
>
> Harald
>
> _______________________________________________
> http://lists.egnite.de/mailman/listinfo/en-nut-discussion
>