[En-Nut-Discussion] Ethernut 3 Port Pin Usage

[Harald Kipp]

Some of you may have noticed, that our Internet server got a few 
problems recently. Indeed it had been hacked and the installed exploit 
scanner (from haitaiteam) crashed the system immediately after being 
started.

The following email may have been jammed by the mailing list processor 
and passed to me via private email. I think it is of general interest:

> for a project I need to use at least 14 I/O pins of the expansion port
> as inputs to connect some buttons. I'd like to use a pulldown resistor
> to GND and connect the button to VCC.
> 
> So far everything is ok, but I'm sonewhat confused about the internal
> usage of the I/O pins. Reading
> http://www.ethernut.de/en/hardware/enut3/ports.html
> 
> I think I could use 
> 
> 
> P0, P1, P2, P3, P4, P5, P6, P7

Definitely. They are intentionally left unused to provide an 8-bit port.

> P8, P11, P12, P18 abd P19 

Using P18 and P19 requires to set the JTAG jumper for AT91 JTAG only:
http://www.ethernut.de/img/s-jtag-at91.png
as you already mentioned below.


> for this purpose.
> 
> Now I'm a little confused about the internal connection of these pins on
> the Ethernut3 board.
> 
> P3-P7, P8, P12 and P18 / P19 are connected to the cpld.

P3-P7,P8 may serve as timer I/O for specific functions implemented in 
the CPLD. P12 may be used to generate FIQs via the CPLD. They are all 
unused in the standard configuration (unused CPLD inputs).


> P18 and P19 should be possible to use when setting the jumpers the
> correct way.

Yes.


> It seems that the inputs are influenced by the cpld in some way. If I
> use pulldown resistors > 20k-50k the pins are stuck at high after
> pushing the connected button once. With lower resistors (10k) it seems
> to work for this purpose, my oscilloscope still shows some influence by
> the cpld. Are'nt thos connected but internaly unused cpld pins
> configured as tri-state?
> 
> Only the pins P0, P1, P2 and P11 work as expected.

Yes, I'd expect that the CPLD pins are tri-stated. However, in general 
it is more common (and fail safe) to use pull-ups and let the buttons 
pull to ground. That may be a reason why this problem hadn't been 
discovered so far. Would your application allow this change?

Alternatively you may try to decrease the pull-down value.

Btw. are you aware, that the AT91 CPU on Ethernut 3 is _not_ 5V tolerant?

If you want to try modifying the CPLD yourself, do not miss
enut30npl-20071207.zip
available at
http://www.ethernut.de/en/hardware/enut3/nplupgrd.html

Please keep us informed about any success or failure,

Harald