[En-Nut-Discussion] Ethernut 5.0 Schematic Preview

[Alain M.]

Hi Harald,

More comments:

1) have you considerd powering the ATMEGA with 3.3V, I believe that a 
LOT of things would be simpler. In fact I have ben studying a project 
very similar to that (ARM9 + AVR for supervion) and I noticed that it 
runs very well at 8MHz with 3V3. A lot of level shifts would be 
eliminated :)

2) I supose that L1, L2 and L4 are there for EMI too?

3) dividers R67/R63 and R69/R65 are somewhat strange, wouldn't it be 
just a simple pull-up?

4) if you have a RTC chip, you should have a battery too... it could on 
the bottom side of the board so that it does not use any pcb area, or at 
least justa connector could be nice.

5) F1 could be a Polyswitch, more practical, uses much less board space.

6) This is going to be a Develloper's tool, so IMHO no pin should be 
unreacheable (TST, SHDN, A18, A19, A20 maybe more...)

That is about it :)

Alain
PS, consider the JTAG standard connector once more...