[En-Nut-Discussion] AT91SAM7X256 TC1 Timer being disabled

[Coleman Brumley]

> I fail to see how a missed interrupt can lead to timer stopping.

What was really peculiar was not only did the TC1 interrupt stop, but also
the TC0 interrupt which is the main Nut/OS timer.  This, of course, was
REALLY bad and caused all sorts of other cascading failures (threads failing
to execute, etc.).   

> This sounds like a design failure somewhere else.

The version posted by Timothy works as expected, i.e. the timer interrupt
doesn't stop working.  This version has now been running for almost 48 hours
without fail, whereas the sample posted at
http://www.ethernut.de/en/documents/at91-timer-irq.html, which is what my
code was using fails usually after a couple of hours.  

The only differences between the two register functions are:

-/* Select divider and compare trigger */
-outr(TC1_CMR, TC_CLKS_MCK32 | TC_CPCTRG);

+/* Select divider and compare trigger */
+outr(TC1_CMR, TC_CLKS_MCK32);

-/* set to lowest priority (0) */
-NutIrqSetPriority(&sig_TC1, 0);

+/* set to highest priority (7) */
+NutIrqSetPriority(&sig_TC1, 7);

And, there's the addition of the code to increment the compare register in
the handler:

+//increase compare value to next interrupt value
+//(signed short allows for overflow wrapping)
+#ifndef NUT_TICK_FREQ
+#define NUT_TICK_FREQ   1000UL
+#endif
+#if defined(AT91_PLL_MAINCK)	
+	#define COMPARE_ADDER (At91GetMasterClock() / (32 * NUT_TICK_FREQ))

+#else
+    #define COMPARE_ADDER (NutGetCpuClock() / (32 * NUT_TICK_FREQ))
+#endif
+	compare_value += COMPARE_ADDER;
+	outr(TC1_RC, compare_value);	//new compare value

> Reenabling interrupts adds more complexity, because interrupt routines
> are not safe to modify global tables anymore - e.g. for posting an
> event.

It's seems like this bug is in IRQ_ENTRY and IRQ_EXIT for the ARM7.  I'm not
an ARM assembly expert by any means, so this was out of my realm of comfort
for trying to address.