[En-Nut-Discussion] Strange problems with SPI in PDC mode on AT91SAM7XC512

[Ole Reinhardt]

Hi all,

I gave the PDC mode transfer of SPI Bus 0 on the AT91SAM7XC512 a chance.

It seemed to work with an SD Card connected to SPI0_NPCS1, but I have
strange effects when using a dataflash at SPI1_NPCS0 in parallel.

Btw: Both are configured in SPI_MODE0

First of all, the MMC transfers seem to work. Next I try to access the
dataflash with uflashfs. The first transfer done on the NPCS0 (dataflash
cs) is just a status request which should return 0x7F 0xB4

On my oscilloscop everything looks fine, but the result of the PDC
transfer seem to have an offset of 1 so I get 0xFF7F, the 0xB4 byte is
dropped.

In other words, the PDC transfer does not work correctly and is dropping
the first received byte.

Next strange problem:

Again, the PDC transfer with the MMC card works fine, but when accessing
the dataflash again, the chipselect rises too early (here at 14 clocks
on a 2 byte transfer (16 should be ok). 

To workaround this, I tried to add a short delay after each transfer.
Which at least works (CS is hold long enough) but the above problem
still exists.

At least there is a last strange problem :)

To avoid extra overhead for PDC transfers I added this little heuristic
to use polling mode transfers, if xlen < 4

Now the output on the MOSI pin stays at high level and therefor the
transfer does not work properly at all.

Testcase is still the same as above, the problem seem to only occur
together with the dataflash.

I'm totaly confused as with just using polling transfers or just using
interrupt driven transfers everything works fine.

Any suggestions out there?

Bye,

Ole


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