[En-Nut-Discussion] ARM 7 why access the SPSR

[京川]

en-nut-discussion，您好！
	i see infomation from arm

	http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/Cihjcedb.html

	You must not attempt to access the SPSR when the processor is in User or System mode. This is your responsibility. The assembler cannot warn you about this, because it has no information about the processor mode at execution time.

If you attempt to access the SPSR when the processor is in User or System mode, the result is unpredictable.

but  in context.c we see thes code below

  __asm__ __volatile__
            /* Load initial idle thread context. */
         ("@ Load context\n\t"
          /* Restore stack pointer. */
          "ldr     sp, %[td_sp]\n\t"
          /* Get saved status... */
          "ldmfd   sp!, {r0}\n\t"
          /* ...enable interrupts */
          "bic     r0, r0, #0xC0\n\t"
          /* ...and save in spsr. */
          "msr     spsr, r0\n\t"
          /* Restore registers. */
          "ldmfd   sp!, {r4-r11, lr}\n\t"
          /* Restore status and return. */     
          "movs    pc, lr"
          /* Input. */
          :
          /* Output. */
          :[td_sp] "m" (runningThread->td_sp)
          /* Clobbers. */
          :"r0", "memory");


 why wencan use this code  "msr     spsr, r0 ",help me please 

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礼！
 				

　　　　　　　　京川
　　　　　　　　64018 at 263.net
　　　　　　　　　　2012-04-06