[En-Nut-Discussion] Do we need something like sbv/sbi to complement sbi/cbi?

Uwe Bonnes bon at elektron.ikp.physik.tu-darmstadt.de
Sun Jan 1 23:51:57 CET 2012


>>>>> "Ulrich" == Ulrich Prinz <ulrich.prinz at googlemail.com> writes:

...
    Ulrich> Please look at the stm32_gpio.c and it's relevant .h file.  All
    Ulrich> gpio functions are single cycle single access regardless of
    Ulrich> their names.

    Ulrich> Using the bitband functions as a reference any Cortex Register
    Ulrich> can be access atomic for switching single bits in it.

As adding reworked lists of register defines needed with your approach can
lead to trouble, what about following approach:

First a macro to get the Bit Index from a bit value:
#define  _BI2(arg) (((arg) & 0x00000002) ? 2: 1)
#define  _BI4(arg) (((arg) & 0x0000000f) ? (_BI2(arg>> 2) +  2) :  _BI2(arg))
#define  _BI8(arg) (((arg) & 0x000000ff) ? (_BI4(arg>> 4) +  4) :  _BI4(arg))
#define _BI16(arg) (((arg) & 0x0000ff00) ? (_BI8(arg>> 8) +  8) :  _BI8(arg))
#define _BI24(arg) (((arg) & 0x00ff0000) ? (_BI8(arg>>16) + 16) : _BI16(arg))
#define _BI32(arg) (((arg) & 0xff000000) ? (_BI8(arg>>24) + 24) : _BI24(arg))
 
Then a macro to get the register address based on the register base
(e.g. GPIO_BASE) and the register definition in the register struct in
stm32f10x.h
#define CM3ADDR(base, regstruct, reg) ((base) + offsetof(regstruct, reg))

so CM3ADDR(GPIOA_BASE, GPIO_TypeDef, ODR) will give us the address of the
ODR register in the GPIOA bank, and the Bitbanding addresses could be
calculated from that. 

Then you can call
GPIOBITBAND(CM3ADDR(, regstruct, reg), _BI(something).

As these definitions are not contraint to GPIO, the definitions should
probably go to include/arch/cm3.h.

Bye 
-- 
Uwe Bonnes                bon at elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------



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