[En-Nut-Discussion] IP Checksum calculation broken. Reenabled old algorithm for the meantime.

Ole Reinhardt ole.reinhardt at embedded-it.de
Mon Jun 18 14:28:23 CEST 2012

Hi Harald,

> > What's about the ICMP checksum thing where we calculate the checksum
> > just over a part of the ICMP packet data?
> That should make any difference. However, in sys/types.h we have
> #if defined(__avr__)
> #define NUTMEM_ALIGNMENT        1
> #elif defined(__CORTEX__)
> #define NUTMEM_ALIGNMENT        1
> #elif defined(__ARM__)
> #define NUTMEM_ALIGNMENT        4
> #elif defined(__AVR32__)
> #define NUTMEM_ALIGNMENT        4
> #else
> #define NUTMEM_ALIGNMENT        sizeof(int)
> #endif
> #endif
> This means, that malloc() will use 1 byte alignment for the Cortex. In
> this case forget everything I told you about NETBUF alignment.

Would it really hurd to set the alignment to 4 for Cortex M?

Just ask because several peripherals of the LPC need 4 byte aligned
buffers (e.g. the iap flash driver). If malloc does not guarantee 4 byte
aligned buffers we would have to check and / or modify alignment just
before passing a buffer to such a peripheral! 

> On ARM and AVR32, NETBUFs are allocated by malloc with 4 byte
> alignment. The 14 byte Ethernet header is shifted by 2, resulting in 4
> byte IP header alignment. On Cortex and AVR this doesn't make much
> sense, but shouldn't hurt.

Right, but setting alignment to 4 bytes on Cortex M would just waste a
few bytes in some applications but would save us a lot of trouble with
alignment issues in periphral drivers.

> Since I introduced the current version of the checksum routine, I never
> experienced any problems with AVR/ARM7/ARM9. Considering this, may be
> either the checksum routine is still buggy on certain alignments or the
> compiler cannot handle this correctly, as Bernard reported.

Yes, good point. We should check the assembler output.

> I'm not yet familiar enough with the Cortex platform. But it looks
> strange to me, that no alignment is required at all. I expected at
> least 16-bit alignment.

Yes, as mentioned above cortex _can_ access unaligned variables, but for
speed reasons and also the above mentioned reasons I'd like to set the
alignment to 4 bytes there.




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