[En-Nut-Discussion] Ethernut on TI's Cortex-M3 (Stellaris LM3S...)
phip at hb9etc.ch
Mon Oct 15 22:48:03 CEST 2012
Hi Ole, hi Uwe!
On 10/15/2012 04:11 PM, Ole Reinhardt wrote:
> Hi Philipp,
> You use openocd? Great! So you can simply figure out where you are and
> what caused the exception:
> Let me explain it step by step.
Hey, thanks a lot for these instructions! I couldn't solve the problem
yet, but debugging works exactly as you promised. So here's what I've
found out so far:
The initialization procedure of the processor completes and it hits
main(). After that, the "run mode clock gating register 2 (RCGC2)" is
set to 0x000f, which should enable the clock to GPIO ports A through H.
It then does a few dummy reads from the same register, just as noted in
the datasheet. The next line would then read Port F's data direction
register located at 0x4002.5400. As soon as it tries to read from this
memory location, it is thrown into the exception handler with the MMADDR
(memory management fault address) pointing to 0x4002.5400.
So the CPU seems to be quite convinced that it should not access this
memory, location, but I have no idea why. Included with StellarisWare is
an example called "blinky" which uses more or less the same code
(without the ethernut specifics of course) and the LED blinks just fine.
Oh, what I just checked: The GPIO registers may be accessed through the
APB (legacy) or AHB. 0x4002.5400 is in the APB range and the GPIOHBCTL
register contains 0, which means that APB is used for all ports. So this
should be fine.
Here's the relevant snippet from the disassembly:
102: 9301 str r3, [sp, #4]
104: f245 0300 movw r3, #20480 ; 0x5000
108: f2c4 0302 movt r3, #16386 ; 0x4002
10c: f245 0200 movw r2, #20480 ; 0x5000
110: f2c4 0202 movt r2, #16386 ; 0x4002
114: f8d2 2400 ldr.w r2, [r2, #1024]
118: f042 0208 orr.w r2, r2, #8 ; 0x8
11c: f8c3 2400 str.w r2, [r3, #1024]
120: f245 0300 movw r3, #20480 ; 0x5000
124: f2c4 0302 movt r3, #16386 ; 0x4002
128: f245 0200 movw r2, #20480 ; 0x5000
12c: f2c4 0202 movt r2, #16386 ; 0x4002
The exception occurs at 0x114.
> If you can not find the problem, please drop me a line. I also have an
> LM2S9B96 development kit, so I could do some debugging here...
I hoped to be able to solve it myself, but no success so far. Would be
great, if you could've a look at it. Compiler input and output can be
Thank you very much!
lm3s_clk.c is mine, but system_LM3S.c is by TI. I'll move it and correct
the line endings, thanks for the hint.
Which lm3XX.conf did you mean? At least git does not show any untracked
file like this, so it should either be in the repo or cause a build
failure if really necessary.
Concerning the debugging, please see above
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