[En-Nut-Discussion] Cortex M0 support

[Uwe Bonnes]

Hello,

the recent commits to trunk has now support for Cortex MO and some of the
devices in STM32F0. apps/uart worked for 32F072BDISCOVERY and
STM32F0DISCOVERY.

The bitbanding macros were rewritten so that on Cortex without the optional
bitband support they can be resolved into normal register operation. The
bitband macros are written do work with bit arguments > 32 bits. So a
construct like lpc177x_8x_clk.h
#define SysCtlPeripheralResetEnable(bit)  if ((bit) < 32) \
             CM3BBSET(LPC_SC_BASE, LPC_SC_TypeDef, RSTCON0, (bit)); else \
             CM3BBSET(LPC_SC_BASE, LPC_SC_TypeDef, RSTCON1, (bit - 32));
can be rewritten simply as
#define SysCtlPeripheralResetEnable(bit)\
  CM3BBSET(LPC_SC_BASE, LPC_SC_TypeDef, RSTCON0, (bit))

as long as RSTCON0 and RSTCON1 are adjacent uint32_t registers.

Bye
-- 
Uwe Bonnes                bon at elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
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