[En-Nut-Discussion] NutEnterCritical vs NutEnterCriticalAccess()
bon at elektron.ikp.physik.tu-darmstadt.de
Tue Nov 17 17:10:42 CET 2015
>>>>> "Ole" == Ole Reinhardt <ole.reinhardt at embedded-it.de> writes:
Ole> Hi Uwe, I suspect you are on the wrong track. In my understanding
Ole> assigning the value of one variable to another will result at least
Ole> in one load and one store operation on ARM.
I am not talking about atomic read-modify-update. I talk about a single
read _or_ write to a volatile variable.
Look e.g. at dev/usart.c: UsartResetBuffer
/* Disable further buffer usage. */
rbf->rbf_siz = 0;
rbf->rbf_siz is only changed by UsartResetBuffer itself. But the IRQ
routines uses this value for calculation of available/used bytes and size== 0
means that the buffer is not available.
On AVR the operation
rbf->rbf_siz = 0;
may be interrupted, leaving rbf_siz in an "undefined" state with either the
high or the low byte already set to zero and the other byte still
valid. Only this situation is addressed by the critical section around the
access. But on 32-bit machines, rbf->rbf_siz = 0 is atomic per-se and so the
critical section is not needed.
Ole> Even more, if one of the variables uses indirect addressing (like
Ole> in your example)
Look atdev/usart.c: UsartRead()
avail = rbf->rbf_cnt;
The purpose of the critical section is to read valid data. The data may have
changed just before or will change just after, that doesn't matter if we
guarantee to always read a valid value. On AVR this is not guaranteed for
values > 1 Byte, but on a 32-bit machine this is guaranted for up to 4-byte
Ole> Instead of writing such error prone hacks, I would suggest to only
Ole> disable single interrupts instead of disabling the whole interrupt
Ole> handling, wherever possible.
I agree, machine specific driver code should do so. But code in dev/ does
not know the IRQ involved and so can not do so.
Uwe Bonnes bon at elektron.ikp.physik.tu-darmstadt.de
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
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