[En-Nut-Discussion] 答复： SPI and polling transfer

[kontais]

Hi,    POLL is basic,  software accuracy control, debug convenient, DMA is good for speed and CPU usage, IRQ is bad.


About SPI read only bug on STM32F1


Index: E:/ethernut_code/nut/arch/cm3/dev/stm/stm32_spi.c
===================================================================
--- E:/ethernut_code/nut/arch/cm3/dev/stm/stm32_spi.c (revision 6225)
+++ E:/ethernut_code/nut/arch/cm3/dev/stm/stm32_spi.c (working copy)
@@ -625,6 +625,7 @@
             while( xlen > 0) {
                 if(xlen < 2) {
                     /* Follow procedure "Disabling the SPI" */
+                    while(GpioPinGet(SPIBUS_SCK_PORT,SPIBUS_SCK_PIN));               ---> Change 1
                     while(!(GpioPinGet(SPIBUS_SCK_PORT,SPIBUS_SCK_PIN)));
                     while(GpioPinGet(SPIBUS_SCK_PORT,SPIBUS_SCK_PIN));
                     base->CR1 &= ~SPI_CR1_SPE;
@@ -634,6 +635,8 @@
                 if (rxbuf) {
                     *(uint8_t *)rxbuf = base->DR;
                     rxbuf++;
+                } else {
+                    (void) base->DR; /* Empty DR */                                    ---> Change 2
                 }
             }
         }


Change 1:
If use bellow to generate only one clock, need add change 1 to delay one full SPI clock cycle
  (*bus->bus_transfer) (node, NULL, NULL, 1);
  
Change 2:
If not clear overrun flag, generate clock more than 3 will not meet expect
  (*bus->bus_transfer) (node, NULL, NULL, 3);




------------------------------------------------------------------发件人：Uwe Bonnes <bon at elektron.ikp.physik.tu-darmstadt.de>发送时间：2015年10月17日(星期六) 01:03收件人：en-nut-discussion <en-nut-discussion at egnite.de>主　题：[En-Nut-Discussion] SPI and polling  transfer
Hello,

bringing up SPI on some new device, probably always polling transfer is
implemented first. So did the STM32 SPI driver. However, is there any reason
to keep polling transfer in a mature driver? At present the STM32 provides
a choice polling transfer, IRQ transfer with an event every byte transferred
and block DMA transfer with only one event at the end of the tranferred block.

For STM32 an SPI interrupt entry is always available. So there is no
incentive to "keep polling transfer as otherwise precious resources are
occupied".

Any other reasons?

B.t.w: "SPIBUSx_POLLING_MODE" is found in the configurator for nearly all
archs...

-- 
Uwe Bonnes                bon at elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
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