[En-Nut-Discussion] Removal of 8-bit AVR support (Re: STM32L051 and LPUART)
bon at elektron.ikp.physik.tu-darmstadt.de
Mon Oct 31 18:52:03 CET 2016
>>>>> "Nathan" == Nathan Moore <nategoose at gmail.com> writes:
Nathan> I hadn't, but even though those are for Itanium the API might be
Nathan> worth mimicking, as long as Intel doesn't care, since GCC got
Nathan> them from Intel's ABI documentation for Itanium. I was really
Nathan> just thinking about EnterCritical and ExitCritical macros that
Nathan> either knew or were told what size data they were protecting and
Nathan> compiled to no code for 32 bit updates on 32 bit memory width
Nathan> architectures. Having interfaces that actually encompassed the
Nathan> synchronization and the work might make them easier to use,
Oops, I mixed up things.
AVR Libc has a util/atomic.h. A short glimpse in the gcc-arm-none-eabi
includes brought up also some atomic includes, I thought that were the same.
Obvious they are not !
Uwe Bonnes bon at elektron.ikp.physik.tu-darmstadt.de
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
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