[En-Nut-Discussion] anyone using SAM7S32?

[Bernd Walter]

On Tue, Jul 28, 2009 at 10:04:27PM +0200, Bernd Walter wrote:
> On Tue, Jul 28, 2009 at 09:27:14PM +0200, Adam Dybkowski wrote:
> > Bernd Walter wrote:
> > 
> > > Just tried to run ethernut the first time on a SAM7S controller.
> > > My main function doesn't get excecuted it seems, so it looks to be
> > > something in Ethernut startup.
> > > I'd used the included st91sam7s32_rom.ld.
> > [...]
> > 
> > Probably this microcontroller has too small RAM to run Nut/OS for ARM.
> 
> That's why I ask for other people using it.
> Ethernut ships even with an .ld file for SAM7S16, but I'm already
> slightly above 16k codesize.
> 
> > Did you analyze .map file concerning this?
> 
> Yes I did a lot - took some time to strip the codesize down :)
> There are just a few bytes statically allocated.
> 
> [366]devel> arm-elf-size main
>    text    data     bss     dec     hex filename
>   16984      48    2460   19492    4c24 main
> 
> 2x 1k in bss are stacks.
> 
> Not completely sure about dynamic allocation until main startup.
> I've defined 512 Bytes for idle and 1024 for main stack.
> This should be far away from the 8k limit.

It hangs somewhere in crtat91sam7sex_rom.S.
I have 3 active high LED available.

[320]devel> svn diff init/crtat91sam7sex_rom.S
Index: init/crtat91sam7sex_rom.S
===================================================================
--- init/crtat91sam7sex_rom.S   (revision 4292)
+++ init/crtat91sam7sex_rom.S   (working copy)
@@ -201,6 +201,13 @@
         str     r0, [r1, #WDT_MR_OFF]
 #endif
 
+        /* Disable LED3. */
+        ldr     r1, =PIOA_BASE
+        ldr     r0, =256
+        str     r0, [r1, #PIO_CODR_OFF]
+        str     r0, [r1, #PIO_PER_OFF]
+        str     r0, [r1, #PIO_OER_OFF]
+
         /*
          * Enable the main oscillator. Set startup time of 6 * 8 slow 
          * clock cycles and wait until oscillator is stabilized.
@@ -214,6 +221,13 @@
         tst     r0, #PMC_MOSCS
         beq     wait_moscs
 
+        /* Disable LED2. */
+        ldr     r1, =PIOA_BASE
+        ldr     r0, =4
+        str     r0, [r1, #PIO_CODR_OFF]
+        str     r0, [r1, #PIO_PER_OFF]
+        str     r0, [r1, #PIO_OER_OFF]
+
         /*
          * Switch to Slow clock in case PLL was already set up.
          */
@@ -262,6 +276,13 @@
         tst     r0, #PMC_MCKRDY
         beq     wait_pllsel
 
+        /* Disable LED1. */
+        ldr     r1, =PIOA_BASE
+        ldr     r0, =2
+        str     r0, [r1, #PIO_CODR_OFF]
+        str     r0, [r1, #PIO_PER_OFF]
+        str     r0, [r1, #PIO_OER_OFF]
+
         /*
          * Enable SDRAM interface, if configured.
          */

LED3 and LED2 both goes off.
LED1 stays on.
Sounds a bit like PLL trouble.
The hardware is self build, but sam-ba starts with PLL enabled
and I used very typical RC-values.
I also tried 47923200 Hz - just in case, although my PLL values for
55000073 Hz work fine on SAM7X256 and SAM7X512.

Does anyone have an idea about it?
I just remember that early Atmel sample code for PLL startup was wrong
somehow, but don't remember the details.

-- 
B.Walter <bernd at bwct.de> http://www.bwct.de
Modbus/TCP Ethernet I/O Baugruppen, ARM basierte FreeBSD Rechner uvm.