[En-Nut-Discussion] External interrupts on Ethernut 3

[Petri Hyötylä]

Sorry for spamming the list.
Apparently manipulating the registers of the microcontroller is not
necessary, which of course is logical for this kind of os.
Originally I was adapting the SJA1000 driver for MCP2515 and in the
initialization of the SJA1000 driver there was some direct register access
which I assumed was necessary because that driver was in the Nut/OS
distribution.

The interrupt handling still does not work but at least I get interrupts
(Which unfortunately jam the system currently).

On Thu, Mar 26, 2009 at 3:53 PM, Petri Hyötylä <phyotyla at gmail.com> wrote:

> Hi all,
>
> I have been porting my application from Ethernut 2 to Ethernut 3and I have
> one final thing to do before I can start final testing: Enable one external
> interrupt in an MCP2515 driver which I wrote.
> I followed the way it was done in
> http://www.ethernut.de/api/ax88796_8c-source.html#l00961 but there is a
> part that confuses me. What function pointer should I give to the
> interrupt/exception handler? This is also the first time I write for the ARM
> architecture so if there is something wrong or suboptimal in the code,
> please comment.
>
>     //Register the interrupt to Nut/OS
>     NutRegisterIrqHandler(&CAN_SIGNAL, CAN_Interrupt, NULL);
>
>     #ifdef ETHERNUT2
>
>     ....
>
>     #endif
>
>     #ifdef ETHERNUT3
>
>     NutEnterCritical();
>
>     // Register interrupt handler and enable interrupts.
>     // Disable FIQ interrupts.
>     outr(AIC_IDCR, _BV(FIQ_ID));
>
>
> ****************************
>     What should I put here?
>     In http://www.ethernut.de/api/ax88796_8c-source.html#l00961
>     a pointer to the interrupt handler was given as follows:
>     /* Set the TC0 IRQ handler address */
>     outr(AIC_SVR(IRQ0_ID), (unsigned int) NicInterruptEntry);
> *******************************
>
>     /* Set FIQ to low level sensitive
>      * This is the default so this part is done just in case
>      * something has changed the register value
>      */
>     outr(AIC_SMR0, 0);
>     // Clear FIQ interrupt
>     outr(AIC_ICCR, _BV(FIQ_ID));
>     // Enable FIQ interrupt
>     outr(AIC_IECR, _BV(FIQ_ID));
>     // Enable PIO interrupt for the P12(FIQ). Redundant?
>     outr(PIO_IER, _BV(12));
>
>     NutExitCritical();
>
>     #endif
>
> Regards,
> Petri
>