[En-Nut-Discussion] Ethernut on TI's Cortex-M3 (Stellaris LM3S...)

[Ole Reinhardt]

Hi Philipp,

sorry, I missed that you posted another mail...

> http://hb9etc.ch/ethernut/

> Good point. I hope that my changes do not interfere with any other 
> targets, but this needs to be ensured of course. Are there any 
> testsuites for this, or do you usually do this by hand?

AFAIK Harald has something like this but I don't know if it is public.
I'm doing this manually by compiling for different targets.

> >>
> >> Do you have any sample sources (CMSIS examples) which came with your
> >> devkit? You could easily take over the settings (and code) provided in
> >> your system.c file (most probably it will be called system.c)
> >>
> 
> Yes, the distribution comes with a whole bunch of examples. As 
> mentioned, the actual implementation of the drivers should not cause too 
> much trouble, but I had to know how to interface with Ethernut before.

I looked a little into you patchset and found the following:

- In nut/include/arch/cm3/lm3/lm3s9b96.h you are referencing a STM32
  header.

- Further you created 

  nut/include/arch/cm3/lm3/vendor/lm3s9b96.h

  Better place it in 

  nut/include/arch/cm3/lm3/lm3s9b96.h

  Why the "vendor" subtree?

- As Uwe just mentioned you should try to specify some "family" macros
  instead of using CPU specific macros where ever possible.

- Your CPU header seem not to follow the "struct" way, like most other
  Cortex Mx CPU headers does. Yes we just had some long discussions
  about this. But as the STM32 and NXP port just started using this way
  and most other CPU vendors follow this way as well it would be a good
  idea to go the same way. Otherwise we will get in trouble with the
  common function that use 

  SCB->VTOR = (uint32_t)g_pfnRAMVectors;

  instead of 

  outw(SCB_VTOR, (uint32_t)g_pfnRAMVectors)

  for example.

  Does TI not provide headers of this style?


So far for the moment,

Ole


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