[En-Nut-Discussion] Good grief, GPIO again! (was Re: Why not change from Nut/OS to BeRTOS)

[Harald Kipp]

Hi Uwe,

Note all, that I'm not upset about introducing bugs, that's part of the
development process. But I'm quite upset about breaking a working code
and then don't care about for months.

On 10.06.2013 19:31, Uwe Bonnes wrote:
>>>>>> "Harald" == Harald Kipp <harald.kipp at egnite.de> writes:
> 
>     Harald> Hi all, I have no idea how to proceed... I'm in a very bad
>     Harald> mood... :-(
> 
> Sorry for that.

Comparing that damage to all the enhancements you did, your kudos rank
didn't really suffer. :-)


> I see that those definitions come from cfg/arch/avr.h. I never expected
> some GPIO definitions in that location and none of the examples in the app
> directory used GPIOx_ID, so I never stepped on that problem.

Well, initially they come from the Configurator and we have to make
sure, that either existing configurations are maintained. Or worse, give
up backward compatibility and modify all existing configurations.


> Could you please try appended include/arch/avr.h? This should base all AVR
> GPIO acces to the new scheme.

I'd have tested this, if it would provide a general solution. But it
doesn't, for at least two reasons:


1. #define NUTGPIO_PORTA _SFR_IO_ADDR(PORTA) introduces a dependency on
avr-libc. Although avr-libc is the first choice for 8-bit AVRs, I do not
like to _needlessly_ add new dependencies. Anyway, this is a minor issue
and can be solved. And, pleeeease, it should be solved.


2. Consider this

GpioPinGet(AVRPORTF, 0);

on an ATmega128, which translates to

#define AVRPORTF    PIOF_ID

and with your new include/cfg/arch/avr.h to

#define PIOF_ID     NUTGPIO_PORTF

and the final address

#define NUTGPIO_PORTF _SFR_IO_ADDR(PORTF)

which is at 0x62. Now

#define GpioPinGet(bank, bit) (AVR_PINX(bank) & _BV(bit))

and

#define AVR_PINX(bank) (_SFR_IO8(bank -2))

will result in

_SFR_IO8(0x60) & _BV(0)

But that's plainly wrong!

PINF is at 0x20 (I/O address 0), while 0x60 (not an I/O address) is a
reserved register.

Regards,

Harald