[En-Nut-Discussion] SVN Trunk Rev. 5422 breaks GPIO for LPC
ole.reinhardt at embedded-it.de
Sun Oct 20 19:38:46 CEST 2013
unfortunately you latest commit (r5422) breaks GPIO on the LPC.
My initial version implemented GpioPinSet by writing to the FIOSET
register for high values and FIOCLR for low values. You replaced it by
writing either 1 or 0 to the FIOSET register, which will not work as you
can only write ones to these registers, writing 0 won't modify the register.
According to the documentation it would be possible to directly write
the final value to the FIOPIN register. Due to a silicon bug this is
highly discouraged to do so, using the bit banding register access.
If you would write two values using bit band access to the FIOPIN
register directly one after the other, then the first access might get
We have to stay with the access to FIOSET and FIOCLR register.
For now I reverted your last checkin in rev. 5423. Could you please
point out your initial intention?
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