[En-Nut-Discussion] Problem using HSI on STM32
Ulrich Prinz
ulrich.prinz at googlemail.com
Tue Mar 22 11:30:35 CET 2016
Hi!
I am (again) proting a project to NutO/S and (again) it is based on
STM32. While starting to move the project, I tried to start a simple
demo code on the existing hardware using STM32F1 DISCOVERY as a base.
Unfortunately I cannot configure anything to work on STM32F1 internal
HSI by selecting the appropriate settings in qnutconf.
I thought it should work with:
System clock source = SYSCLK_PLL
PLL Clock Source = PLLCLK_HSI
All other settings left as default.
The compile fails with several misconfigured defines, I attached the
compile output at the end.
I hopefully upgraded to the latest repository code but I am truly out
of using SVN I use the git svn commands for now.
I wonder about the fact, that when I initially loaded the
f1_discovery.nut the Device tree was missing and no MPU was selected.
I had to click the F103 to get the missing selections.
kind regards
Ulrich
------------------COMPILE OUTPUT -------------------
11:21:25: ../../nut/arch/cm3/dev/stm/stm32f1_clk.c:83:4: error:
#warning HSE_VALUE too low [-Werror=cpp]
# warning HSE_VALUE too low
^
11:21:25: ../../nut/arch/cm3/dev/stm/stm32f1_clk.c:139:0: error:
"PLLCLK_SOURCE" redefined [-Werror]
# define PLLCLK_SOURCE PLLCLK_HSE
^
11:21:25: In file included from ../../nut/include/arch/cm3/timer.h:65:0,
from ../../nut/arch/cm3/dev/stm/stm32f1_clk.c:47:
../../nutbld-l152-gcc/include/cfg/clock.h:13:0: note: this is the
location of the previous definition
#define PLLCLK_SOURCE PLLCLK_HSI
^
11:21:25: ../../nut/arch/cm3/dev/stm/stm32f1_clk.c:151:0: error:
"PLLCLK_IN" redefined [-Werror]
# define PLLCLK_IN HSE_VALUE
^
11:21:25: ../../nut/arch/cm3/dev/stm/stm32f1_clk.c:93:0: note: this is
the location of the previous definition
# define PLLCLK_IN HSI_VALUE
^
11:21:25: ../../nut/arch/cm3/dev/stm/stm32f1_clk.c:141:40: error:
division by zero in #if
# define PLLCLK_MULT (SYSCLK_FREQ / PLLCLK_IN)
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:189:9: note: in expansion of
macro 'PLLCLK_MULT'
# elif (PLLCLK_MULT < 2) || (PLLCLK_MULT > 16)
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:141:40: error: division by zero in #if
# define PLLCLK_MULT (SYSCLK_FREQ / PLLCLK_IN)
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:189:30: note: in expansion of
macro 'PLLCLK_MULT'
# elif (PLLCLK_MULT < 2) || (PLLCLK_MULT > 16)
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:190:4: error: #warning Wrong
PLLCLK_MULT [-Werror=cpp]
# warning Wrong PLLCLK_MULT
^
11:21:25: ../../nut/arch/cm3/dev/stm/stm32f1_clk.c:141:40: error:
division by zero in #if
# define PLLCLK_MULT (SYSCLK_FREQ / PLLCLK_IN)
^
../../nut/arch/cm3/dev/stm/stm32_clk.c:77:54: note: in expansion of
macro 'PLLCLK_MULT'
# define SYSCLK_RES (((PLLCLK_IN / PLLCLK_PREDIV) * PLLCLK_MULT) / PLLCLK_DIV)
^
../../nut/arch/cm3/dev/stm/stm32_clk.c:80:8: note: in expansion of
macro 'SYSCLK_RES'
# if(((SYSCLK_RES / 1000 * 1001 ) < SYSCLK_FREQ) || \
^
In file included from ../../nut/arch/cm3/dev/stm/stm32f1_clk.c:227:0:
../../nut/arch/cm3/dev/stm/stm32_clk.c:82:4: error: #warning Requested
and resulting frequency differ! [-Werror=cpp]
# warning Requested and resulting frequency differ!
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:141:40: error: division by zero in #if
# define PLLCLK_MULT (SYSCLK_FREQ / PLLCLK_IN)
^
../../nut/arch/cm3/dev/stm/stm32_clk.c:77:54: note: in expansion of
macro 'PLLCLK_MULT'
# define SYSCLK_RES (((PLLCLK_IN / PLLCLK_PREDIV) * PLLCLK_MULT) / PLLCLK_DIV)
^
../../nut/arch/cm3/dev/stm/stm32_clk.c:97:11: note: in expansion of
macro 'SYSCLK_RES'
# if ((SYSCLK_RES / AHB_DIV) / 1 <= APB1_MAX)
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:141:40: error: division by zero in #if
# define PLLCLK_MULT (SYSCLK_FREQ / PLLCLK_IN)
^
../../nut/arch/cm3/dev/stm/stm32_clk.c:77:54: note: in expansion of
macro 'PLLCLK_MULT'
# define SYSCLK_RES (((PLLCLK_IN / PLLCLK_PREDIV) * PLLCLK_MULT) / PLLCLK_DIV)
^
../../nut/arch/cm3/dev/stm/stm32_clk.c:99:11: note: in expansion of
macro 'SYSCLK_RES'
# elif ((SYSCLK_RES / AHB_DIV) / 2 <= APB1_MAX)
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:141:40: error: division by zero in #if
# define PLLCLK_MULT (SYSCLK_FREQ / PLLCLK_IN)
^
../../nut/arch/cm3/dev/stm/stm32_clk.c:77:54: note: in expansion of
macro 'PLLCLK_MULT'
# define SYSCLK_RES (((PLLCLK_IN / PLLCLK_PREDIV) * PLLCLK_MULT) / PLLCLK_DIV)
^
../../nut/arch/cm3/dev/stm/stm32_clk.c:114:11: note: in expansion of
macro 'SYSCLK_RES'
# if ((SYSCLK_RES / AHB_DIV) / 1 <= APB2_MAX)
^
11:21:25: ../../nut/arch/cm3/dev/stm/stm32f1_clk.c: In function
'SetPllClockSource':
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:141:40: error: division by
zero [-Werror=div-by-zero]
# define PLLCLK_MULT (SYSCLK_FREQ / PLLCLK_IN)
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:406:14: note: in expansion of
macro 'PLLCLK_MULT'
cfgr |= (PLLCLK_MULT - 2) * RCC_CFGR_PLLMULL_0;
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c: In function 'SetSysClockSource':
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:141:40: error: division by
zero [-Werror=div-by-zero]
# define PLLCLK_MULT (SYSCLK_FREQ / PLLCLK_IN)
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:434:76: note: in expansion of
macro 'PLLCLK_MULT'
new_sysclk = ((((PLLCLK_IN * PLL2CLK_MULT) / PLL2CLK_PREDIV) *
PLLCLK_MULT) / (PLLCLK_PREDIV * 2));
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:141:40: error: division by
zero [-Werror=div-by-zero]
# define PLLCLK_MULT (SYSCLK_FREQ / PLLCLK_IN)
^
../../nut/arch/cm3/dev/stm/stm32f1_clk.c:436:39: note: in expansion of
macro 'PLLCLK_MULT'
new_sysclk = (PLLCLK_IN * PLLCLK_MULT) / PLLCLK_PREDIV;
^
cc1: all warnings being treated as errors
11:21:25: make[1]: *** [cm3/dev/stm/stm32f1_clk.o] Error 1
make[1]: *** Auf noch nicht beendete Prozesse wird gewartet â¦
11:21:25: make: *** [all] Error 2
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