[En-Nut-Discussion] GPIO Level change IRQ problem on SAM7

[Ole Reinhardt]

Hi Mark,

> I have had similar problems with edge triggered input interrupt. Mine were
> caused by the spurious interrupt not being handled. The interrupt controller
> doesn't get an acknowledge for this interrupt and is "stuck". I don't know
> if Nut/OS does anything with the spurious interrupt? You could try to make
> an ISR for the spurious vector and let this acknowledge the interrupt.

Actualy I think that we won't need an edge triggered interrupt for the
GPIO level change interrupt source at all. This interrupt will always be
cleared by the GPIO ISR routine, and will always be retriggered by any
following level change of the enabled GPIO pins. So I don't see any
reason to use an edge trigger.

My understanding of the spurious interrupt definion does not explain
this situation to me as the spurious interrupt might happen in level
triggered mode only when using the external interrupt sources or when
the internal source are used level triggered and the event is just gone
before reading the AIC_IVR.

If I correctly understand the GPIO level change interrupt system a bit
in the PIO_ISR should be set leading to an interrupt, right? This bit
will only be cleared by reading the PIO_ISR register, so no chance to
miss the interrupt?

Or am I missing some point?

But might it happen that the interrupt occurs again just in the
meanwhile when the interrupt handler routine is running? Setting the IRQ
bit in the PIO_ISR register again, but before the Interrupt handler has
exited? So it might not lead to a new interrupt again?

Strange things :)

Regards,

Ole Reinhardt

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